The electronics industry progresses integrated circuit (IC) products are shrinking in size. The applications supported by these IC's are becoming more powerful with ever-increasing features and functions. This is exemplified as the telephone was transformed into the cellular phone and most recently into the camera phone. All the while these devices continue to shrink in size. Other devices that have evolved include computers, memory devices, personal music players and personal data assistants (PDA's). Each is operated by an integrated circuit die.
Integrated circuits are often manufactured in and on silicon and other integrated circuit wafers. Integrated circuits include literally millions of metal oxide semiconductor field effect transistors (MOSFET). Advances in integrated circuit technology continue to shrink the sizes of these transistors and drive for higher performance with minimum power consumption. This dichotomy has inspired various approaches to solve the need for speed at lower power.
One approach involves continued shrinkage of key features of the integrated circuit technology. This approach provides a size reduction but continues to struggle balancing cost, performance, and power. Another approach involves different integrated circuit materials or material systems, such as silicon on insulator (SOI), silicon germanium (SiGe) material, etc. These alternatives provide some technology improvements but are not mainstream today resulting in higher cost as well as constrain volume capacity.
Yet another approach is to provide performance improvement and power reduction while controlling cost. This approach squeezes as much performance per power out of a given integrated circuit technology and manufacturing through a technique called “strained” transistors. This allows use of existing integrated circuit manufacturing and technology investments to keep the cost down or extend future technology generations.
There are various strained integrated circuit approaches. Some approaches use different material systems as the SOI mentioned earlier. Again, these different material systems provide technology improvements but add cost and are not available in volume to satisfy the high volume modern electronics needs. Other “strained” approaches use mainstream integrated circuit technology and manufacturing, such as complementary metal oxide semiconductor (CMOS).
Integrated circuit technologies have seen many transistor designs and processing schemes to improve the mobility of carriers for improving performance and lowering power consumption. One way to achieve faster switching of a MOS transistor is to design the device with “strained” transistors so that the mobility of its charge carriers in the channel region is increased.
An appropriate type of stress in the channel region of an n-channel metal oxide semiconductor (NMOS) transistor is known to improve carrier mobility, which results in increased drive current for the transistor. High tensile material such as silicon nitride supplies a tensile stress in the NMOS region beneath the tensile layer.
To achieve performance improvement and power reduction in a CMOS device, typically both the PMOS transistor and the NMOS transistor are strained. The PMOS transistor must be strained to provide compression stress to the p-channel while the NMOS transistor must be strained to provide tensile stress to the n-channel. Typically, dual stress liners (DSL) may be used to accommodate the different stress requirements.
Accurate models of the effects of the stress layers over the strained transistors are essential for reliable, high volume manufacturing of integrated circuits utilizing stress liners. However, competitive time to volume pressures and the drive for profitability constrain the analysis, such as gathering test data and simulation time, of this important subject.
For example, only measurement of electrical data, such as currents Ideff (effective drain current) or Idlin (linear drain current), are available to device modeling engineers for creating design models used to design and manufacture integrated circuits. For stress modeling, the electrical data need to be converted into mobility multipliers. Vast amount of mobility measurement is infeasible, whereas vast amount of electrical data measurement is possible. Design models include mobility information derived from the electrical data. However, the relationship between the electrical data and the mobility information are not accurately modeled.
Thus, a need still remains for a system that will allow integrated circuit designers to predict the impact of channel strain on their design prior to manufacture. The demand for highly reliable and long life products make it is increasingly critical that answers be found to these problems. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.